Senior Hardware Engineer

Apply now: Senior Hardware Engineer, location is Onsite (Allentown, PA or Fort Collins, CO). The start date is March for this permanent position.

Job Title: Senior Hardware Engineer
Location-Type: Onsite (Allentown, PA or Fort Collins, CO)
Start Date: March
Duration: Permanent Full Time
Compensation Range: $135,000 – $170,000 annually

Job Description:
Senior-level Hardware Engineer responsible for designing and validating high-speed PCBs supporting custom ASIC products for hyperscale data center and AI infrastructure applications.

Day-to-Day Responsibilities:

• Design and perform schematic capture of complex PCBs using Cadence Allegro

• Develop and maintain PCB component libraries

• Define PCB architecture, design rules, and electrical specifications

• Collaborate with SI, layout, mechanical, and firmware engineers

• Audit PCB layouts for electrical and manufacturing compliance

• Interface with fabrication and assembly vendors

• Test, debug, and rework manufactured boards in lab environments

• Support power delivery design (200W rails) and high-speed signal integrity considerations

• Manage ECOs and maintain manufacturing documentation

• Travel quarterly to collaborate with distributed teams

Requirements:

• Must-Haves:

  • Bachelor's degree in Electrical Engineering

  • 8-10 years of PCB development experience through manufacturing and test

  • Embedded systems development experience

  • Hardware firmware integration experience

  • Experience with host-level Linux environments

  • Strong hands-on lab skills (oscilloscope, DMM, soldering, board debug)

  • In-depth schematic capture experience using Cadence Allegro (or willingness to learn)

  • Experience working directly with PCB fabrication and assembly vendors

  • High-speed PCB design knowledge (blind/buried vias, backdrilling, SI considerations)

  • Comfortable working onsite 5 days per week

• Nice-to-Haves:

  • Proficiency in C and/or Python

  • ASIC or semiconductor validation background

  • Experience in platform integration environments

  • Experience in aerospace, defense, or medical device validation environments

  • AI-focused chip development exposure

  • Power Delivery Network simulation experience